Annotation

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The course "Programmable Logic Design", is taught by students in semester 8. It uses Altera FPGA kits and learns and uses a language to design electronic circuits - Verilog. Various electronic devices (triggers, registers, adders, multiplexers, processors, etc.) are synthesized and a Verilog algorithm and program for their simulation is created using kits. The material is distributed in 30 hours of lectures and 30 hours of exercises.

Content

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• FPGA - principles of action.
• Design language for Verilog electronic circuits.
• Finite State Machines.